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authorTaylan Kammer <taylan.kammer@gmail.com>2026-09-29 22:04:27 +0200
committerTaylan Kammer <taylan.kammer@gmail.com>2026-09-29 22:04:27 +0200
commit1aa80da4fd720a1ba8e8696983e00c5384948159 (patch)
treec85215c751dc1c45ec248eb6ecbe5ab31384123a /notes/260929-color-bits.md
parenta7fd0d10f685faa38ade7cebd6789675fff21b03 (diff)
Amend last note.
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diff --git a/notes/260929-color-bits.md b/notes/260929-color-bits.md
index 47dfcef..cd8b898 100644
--- a/notes/260929-color-bits.md
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@@ -274,3 +274,19 @@ for coloring:
* Black allocation sets the Grey and Black bits on freshly returned
pointers, using the current values of the global mask variables.
+
+Oh, and by the way, having metadata bits on object pointers means you
+need to mask them off when comparing pointers:
+
+ equal(p1, p2) = (p1 & ~COLOR_BITS) == (p2 & ~COLOR_BITS)
+
+Probably not a big deal.
+
+Unpacking a NaN-packed pointer shouldn't need to do anything special;
+you just don't mind the GC bits.
+
+If we add static typing, it's more annoying, since we need to strip
+off bits on every dereference. However, AArch64 has Top Byte Ignore.
+Intel and AMD are lagging far behind, but seem to have started adding
+similar features, like Intel LAM48/LAM57 and AMD UAI. Hopefully, by
+the time Zisp is implemented, these will be universally available!